As the feature size of semiconductor devices continues to decrease, fabrication processes become more difficult to improve the device performance. In order to further increase the carrier mobility of a P-channel metal oxide semiconductor (PMOS) device, the Ge content in an epitaxial SiGe source and drain may be increased.
The present inventor discovered that an increase of the Ge content in the SiGe makes p-type dopants (e.g., boron) to have more difficulty to penetrate into the SiGe. This is because Ge occupies a relatively large area in the Si lattice, reducing the probability that the dopant occupies the lattice positions. On the other hand, more Ge is also located relatively in the Si lattice spaces, which will affect the diffusion of the p-type dopants. Thus, PMOS devices require a higher thermal budget so that the p-type dopant can be more easily included into the SiGe.
However, a high thermal budget will make a diffusion of dopants (e.g., phosphorus) into the source and drain regions of an N-channel metal oxide semiconductor (NMOS) more severe, which can exacerbate the short channel effect, thereby reducing the performance of an NMOS device. Thus, NMOS devices require a lower thermal budget.
Thus, there is a need for a method of manufacturing a semiconductor device that can take into account the opposite thermal budget requirements of PMOS and NMOS devices.